What Is The Difference between Wafer Testing And Chip Testing?

From the point of view of the precision of the test operation and the number of employees, wafer testing (CP) belongs to the "wafer level" process, thousands or even tens of thousands of bare chips are highly integrated on a wafer, and the requirements for the cleanliness level of the test operation, the precision of the operation, and the analysis ability of big data are high. Therefore, test manufacturers with strong technical strength can achieve better benefits through lean production and open the gap with other rivals. The finished chip test (FT) belongs to the "chip level" process, after the finished chip is packaged, it is in a good state of protection, and the physical size and volume are several times to tens of times more than the bare chip in the wafer state, so the requirements for the clean level and the precision of the finished chip test are one level lower than that of the wafer test, and the test work workload and personnel labor amount are also greater.

From the point of view of specific testing process difficulties, the two have different technical difficulties and challenges. In terms of wafer testing, limited by the physical structure and electrical characteristics of the probe card itself, wafer testing is more susceptible to interference, the signal integrity control of high-speed signals is difficult, and more precise fixture hardware and higher environmental conditions are required in the process of test program development and mass production testing. Therefore, wafer testing requires high efficiency testing. Its test projects mainly focus on DC test and low-speed functional test, pursuing the ultimate high simultaneous test. The difficulties are to increase the number of simultaneous tests as much as possible, improve the parallel test efficiency, ensure consistency and stability, and design the probe card with high simultaneous test.
In the aspect of chip test, chip test is generally full module full coverage test, its difficulties are as follows: power control of high-current project, improve the heat redundancy of fixture design; Reduce signal reflection of high-speed test items and ensure signal integrity; Rf test item design impedance matching, reduce interference; Precision measurement and high-precision test projects, etc., all of which involve comprehensive technologies such as test method design, fixture design, test board design and test program development.