What is the function of Hot plate and cold plate (CP) in track? How many are there? Read More

Wafer Acceptance Test (WAT), also known as wafer acceptance test or Process Control Monitor (PCM), is a critical test step in the semiconductor manufacturing process. WAT is a series of tests performed at the final stage of wafer manufacturing to assess its electrical parameters by measuring specific test structures on the wafer. These test structures are not used for actual chip functions, but are specifically designed to detect and monitor all aspects of the manufacturing process. Typically, these tests are performed at the end of the wafer manufacturing process and before final chip packaging and quality inspection. Purpose of WAT Process verification and quality control: The primary purpose of WAT is to verify that the semiconductor manufacturing process is performed according to established technical specifications, ensuring that the circuit on the wafer meets the expected electrical properties. Read More

In this paper, the silicon wafer preparation process is taken as the starting point to facilitate the understanding and selection of suitable silicon wafers. The silicon wafer preparation process is relatively complex, with many and long processing procedures, so the processing quality of each process must be strictly controlled to obtain qualified silicon single wafer (wafer) that meets the technical requirements of the process, otherwise it will have a significant impact on the performance of the device. Read More

The formation of polymer is an important physicochemical phenomenon in the process of silicon wafer etching, which has a significant impact on the final result of etching. Polymers are mainly formed during plasma etching, especially when fluorinated gases (such as CF4 or C2F6) are used. These polymers are formed by the deposition of carbides and fluorides produced during the etching process on the surface or side wall of the silicon wafer. And the formation of polymer has a two-sided influence on the etching process.
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The technological development trends of power management chips include high efficiency and low power consumption, high precision and low noise, low interference, integration, and intelligence. High efficiency and low power consumption focus on energy transfer efficiency and standby current consumption. High precision and low noise emphasize output voltage stability and interference reduction. Low interference is achieved by increasing operating frequency or introducing jitter function to reduce interference. Integration consolidates multiple functions into a single chip, while intelligence allows parameter configuration and real-time adjustments. These trends guide the continuous innovation and improvement of power management chip technology. Read More

Learn about 7nm chips, the metrics used to judge specific process technologies in FinFET processes, and get a general understanding of line widths in advanced processes. Read More